One Stop GATE Forum: 1997- year ECE GATE Paper

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1.   A  transmission  line  of  50   characteristic  impedance  is  terminated  with  a  100  
resistance. The minimum impedance measured on the line is equal to 
  (a)  0   (b)  25   (c)  50     (d) 100  

2.  A  rectangular  air-filled  wave-guide  has  cross  section  of  4  cm  ×  10  cm.  The 
minimum frequency, which can propagate in the wave-guide, is 
  (a)  1.5 GHz  (b)  2.0 GHz  (c)  2.5 GHz    (d) 3.0 GHz 

3. The  line  code  that  has  zero  dc  component  for  pulse  transmission  of  random 
binary data is 
  (a)  Non-return to zero (NRZ)  (b)  Return to zero (RZ) 
 (c)  Alternate Mark Inversion (AM)  (d)  None of the above 

 4.  A cascade amplifier state is equivalent to 
 (a)  a common emitter stage followed by a common base stage   
 (b)  a common base stage followed by an emitter follower   
 (c)  an emitter follower stage followed by a common base stage  
 (d)  a common base stage followed by a common stage 

5.  For  a  MOS  capacitor  fabricated  on  a  p-type  semiconductor,  strong  inversion  occurs when   
  (a)  surface potential is equal to Fermi potential  
 (b)  surface potential is zero   
 (c)  surface potential is negative and equal to Fermi potential in magnitude   
 (d)  surface potential is positive and equal to twice the Fermi potential 

6. In a common emitter BJT amplifier, the maximum usable supply voltage is limited 
by     
  (a)  Avalanche breakdown of Base-Emitter junction    
 (b)  Collector-Base breakdown voltage with emitter open 
(CBO)
   (c)  Collector-Emitter breakdown voltage with base open 
(C BO)
  (d)  Zener breakdown voltage of the Emitter-Base junction 

7.  Each cell of a static Random Access Memory contains 
 (a)  6 MOS transistors  
 (b)  4 MOS transistors and 2 capacitors   
 (c)  2 MOS transistors and 4 capacitors   
 (d)  1 MOS transistor and 1 capacitor 

8.  A 2 bit binary multiplier can be implemented using 
 (a)  2 inputs ANDs only   
 (b)  2 input XORs and 4 input AND gates only   
 (c)  Two 2 inputs NORs and one XNOR gate  
 (d)  XOR gates and shift registers 

9.  In standard TTL, the ”totem pole‘ stage refers to 
 (a)  the multi-emitter input stage  (b)  the phase splitter 
 (c)  the output buffer      (d)  open collector output stage 

10.  The inverter 74ALSO4 has the following specifications: 
 m ax m ax m ax ma x
0.4 , 8 , 20 , 0.1 ,
I mA I ma I mA I mA
= - = = = -  
OH OL i H i L
  The fan out based on the above will be 
 (a)  10  (b)  20  (c)  60  (d) 100 

11.  In an 8085 P system, the RST instruction will cause an interrupt   
 (a)  only if an interrupt service routine is not being executed       
 (b)  only if a bit in the interrupt mask is made 0 
 (c)  only if interrupts have been enabled by an EI instruction       
 (d)  None of the above 

Author	Message
Neha Agarwal Groupie Joined: 04Jan2007 Online Status: Offline Posts: 59	Topic: 1997- year ECE GATE Paper Posted: 14Feb2007 at 3:52pm
	1. A transmission line of 50 characteristic impedance is terminated with a 100 resistance. The minimum impedance measured on the line is equal to (a) 0 (b) 25 (c) 50 (d) 100 2. A rectangular air-filled wave-guide has cross section of 4 cm × 10 cm. The minimum frequency, which can propagate in the wave-guide, is (a) 1.5 GHz (b) 2.0 GHz (c) 2.5 GHz (d) 3.0 GHz 3. The line code that has zero dc component for pulse transmission of random binary data is (a) Non-return to zero (NRZ) (b) Return to zero (RZ) (c) Alternate Mark Inversion (AM) (d) None of the above 4. A cascade amplifier state is equivalent to (a) a common emitter stage followed by a common base stage (b) a common base stage followed by an emitter follower (c) an emitter follower stage followed by a common base stage (d) a common base stage followed by a common stage 5. For a MOS capacitor fabricated on a p-type semiconductor, strong inversion occurs when (a) surface potential is equal to Fermi potential (b) surface potential is zero (c) surface potential is negative and equal to Fermi potential in magnitude (d) surface potential is positive and equal to twice the Fermi potential 6. In a common emitter BJT amplifier, the maximum usable supply voltage is limited by (a) Avalanche breakdown of Base-Emitter junction (b) Collector-Base breakdown voltage with emitter open (CBO) (c) Collector-Emitter breakdown voltage with base open (C BO) (d) Zener breakdown voltage of the Emitter-Base junction 7. Each cell of a static Random Access Memory contains (a) 6 MOS transistors (b) 4 MOS transistors and 2 capacitors (c) 2 MOS transistors and 4 capacitors (d) 1 MOS transistor and 1 capacitor 8. A 2 bit binary multiplier can be implemented using (a) 2 inputs ANDs only (b) 2 input XORs and 4 input AND gates only (c) Two 2 inputs NORs and one XNOR gate (d) XOR gates and shift registers 9. In standard TTL, the ”totem pole‘ stage refers to (a) the multi-emitter input stage (b) the phase splitter (c) the output buffer (d) open collector output stage 10. The inverter 74ALSO4 has the following specifications: m ax m ax m ax ma x 0.4 , 8 , 20 , 0.1 , I mA I ma I mA I mA = - = = = - OH OL i H i L The fan out based on the above will be (a) 10 (b) 20 (c) 60 (d) 100 11. In an 8085 P system, the RST instruction will cause an interrupt (a) only if an interrupt service routine is not being executed (b) only if a bit in the interrupt mask is made 0 (c) only if interrupts have been enabled by an EI instruction (d) None of the above
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