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Arpita
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Joined: 04Jan2007
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Posts: 73
Quote Arpita Replybullet Topic: CSE GATE sample papers
    Posted: 04Jan2007 at 6:31pm


1

Consider the following program segment for a hypothetical CPU having three user registers Rl, R2 and R3.

 

Instruction Operation Instruction Size (in words)
MOV Rl,5000 ; Rl ¬ Memory[5000] 2
MOV R2,(R1) ; R2 ¬ Memory[(Rl)] 1
ADD  R2,R3 ; R2 ¬ R2 + R3 1
MOV 6000, R2 ; Memory[6000] ¬ R2 2
HALT ; Machine halts 1

Let the clock cycles required for various operations be as follows:
Register to/from memory transfer :        3 clock cycles
ADD with both operands in register :    1 clock cycle
Instruction fetch and decode :               2 clock cycles per word
The total number of clock cycles required to execute the program is

Options
A) 29 B) 24
C) 23 D) 20
Correct Answer B

2 The order of an internal node in a B+ tree index is the maximum number of children it can have. Suppose that a child pointer takes 6 bytes, the search field value takes 14 bytes, and the block size is 512 bytes. What is the order of the internal node?
Options
A) 24 B) 25
C) 26 D) 27
Correct Answer C

3 The Boolean function x, y, + xy + x, y
Options
A) x, + y, B) x + y
C) x + y, D) x, + y
Correct Answer D

4 In an MxN matrix such that all non-zero entries are covered in a rows and b columns. Then the maximum number of non-zero entries, such that no two are on the same row or column, is
Options
A) £ a + b  B) £  max {a, b}
C) £  min {M-a, N-b} D) £ min {a, b}
Correct Answer A

5 The relation scheme Student Performance (name, courseNo, rollNo, grade) has the following functional dependencies:
name, courseNo ® grade
rollNo, courseNo ® grade
name ® rollNo
rollNo ® name
The highest normal form of this relation scheme is
Correct Answer A

6 The minimum number of page frames that must be allocated to a running process in a virtual memory environment is determined by
Options
A) the instruction set architecture B)  page size
C) physical memory size  D) number of processes in memory
Correct Answer D

7

Consider the following program segment for a hypothetical CPU having three user registers Rl, R2 and R3.

 

Instruction Operation Instruction Size (in words)
MOV Rl,5000 ; Rl ¬ Memory[5000] 2
MOV R2,(R1) ; R2 ¬ Memory[(Rl)] 1
ADD  R2,R3 ; R2 ¬ R2 + R3 1
MOV 6000, R2 ; Memory[6000] ¬ R2 2
HALT ; Machine halts 1

Consider that the memory is byte addressable with size 32 bits, and the program has been loaded starting from memory location 1000 (decimal). If an interrupt occurs while the CPU has been halted after executing the HALT instruction, the return address (in decimal) saved in the stack will be

Options
A) 1007  B) 1020
C) 1024 D) 1028
Correct Answer A

8 Let G be a simple graph with 20 vertices and 100 edges. The size of the minimum vertex cover of G is 8. Then, the size of the maximum independent set of G is
Options
A) 12 B) 8
C) Less than 8 D) More than 12
Correct Answer A

9  What does the following algorithm approximate? (Assume m > 1, Î > 0).
x = m;
y-i;
while (x - y > Î)
{     x =   (x + y) / 2 ;
       y = m/x ;
}
print (x) ;
Options
A) log m  B)

m2

 

C) m1/2 D) m1/3
Correct Answer C

10 Consider the following C program
main ()
{        int x, y, m, n ;
scanf ("%d %d", &x, &y);
/ * Assume x > 0 and y > 0 * /
 m = x;     n = y ;
while ( m ! = n)
{       if (m > n)
m = m — n;
 else
n = n - m ; }
printf("%d",n); }
The program computes
Options
A) x + y, using repeated subtraction
B) x mod y using repeated subtraction
C) the greatest common divisor of x and y
D) the least common multiple of x and y
Correct Answer C




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