One Stop GATE Forum: GATE–Sample Questions-Digital Circuit

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   Que. 1      Which one of the following is equivalent to AND-OR realization?
A         NAND-NOR realization
B         NOR-NOR realization
C         NOR-NAND realization
D         NAND-NAND realization
Que. 2     The minimal function that can detect a " divisible by 3" 8421  BCD code 
digit is given by
A         D3D1+D4D2+D3D2D1
B         D3D1+D4D2D1+D1'D2D1+D3D4D2'D1'
C         D4D1+D4D2+D3D1'D2'D1
D         D4D2D1'+D4'D2D1+D3D4D2D1
Que. 3     choose the correct statement from the following
A         PROM contains a progrmmable AND array and a fixed OR array
B         PLA contains a fixed AND array and a programmable OR array
C         PROM contains a fixed AND array and a programmable OR array
D         PLA contains a programmable AND array and a programmable OR array
Que. 4     A PLA can be used
A         as a microprocessor
B         as a dynamic memory
C         to realise a sequential logic
D         to realise a combitional logic
Que. 5     A dynamic RAM consist of
A         6 transistors
B         2 transistors and 2 capacitors
C         1 transistors and 1 capacitors
D         2 capacitors only
Que. 6     When a CPU is interrupted, it
A         stops execution of instrution
B         acknowledges interrupt and branches of subroutine
C         acknowledges interrupt and continues
D         acknowledges interrupt and waits for the  next instrutions from the 
interrupting            device
Que. 7     The advantage of using a dual slop ADC in a digital voltmeter is that
A         its conversion time is small
B         its accuracy is high
C         its gives output in BCD FORMAT
D         it does not required a comparator
Que. 8     The minimum number of comparators required to build an 8 bit flash ACD 
is
A         8
B         63
C         255
D         256
Que. 9     The number of address lines in a 8 bit 4k ROM is
A         8
B         10
C         12
D         16
Que. 10     The master-slave flip flop has the characteristic that
A         change in the input immediately in the output
B         change in the output occurs when the state of the master is affected
C         change in the output occurs when the state of the slave is affected
D         both the master and slave states are affected at the same time
Que. 11     A divide by 78 counter can be realized by using
A         6 nos. of mod-13 counters
B         13 nos. of mod-10 counters
C         one mod-13 counters followed by one mod-6 counter
D         13nos. and mod-13 counters
Que. 12     Decimal number 5 in level parity self correcting code
A         00101
B         01011
C         01100
D         10000
Que. 13     The resolution of a D/A convertor is approximately 0.4% of its full scale 
range.it is
A         an 8-bit convertor
B         a 10-bit convertor
C         a 12-bit convertor
D         a 16-bit convertor
Que. 14     The switching speed of ECL is very high,because
A         the transistors are switched between cutoff and saturation regions
B         the transistors are switched between active and saturation regions
C         the transistors are switched between active and cutoff regions
D         the transistors may be operated in three regions
Que. 15     _
      the logical expression Y=A + AB is equal to
A         y=AB
B         y=AB
C         y=A+B
D         y=A+B
Que. 16     Which of the following use least power?
A         TTL
B         ECL
C         CMOS
D         all use same power
Que. 17     A system has a word length of 4-bits.If in this system -ve numbers are 
represented by their Two's compliment,then the range of numbers that can 
be represented by the word length is
A         -8 to +8
B         -7 to +7
C         -16 to +16
D         none of these
Que. 18     Hamming codes are used for error dection and correction.if the minimim 
hammining distance is m, then the number of errors correctable is
A         equal to m
B         less than m/2
C         equal to 2m
D         greater than m
Que. 19     An analog voltage is in the range of 0 to 8v is divided in eight equal 
intervals for conversion to 3-bit digital output the maximum quantization 
error is
A         0v
B         0.5v
C         1v
D         2v
Que. 20     Dule slop integration type A/D converters provide
A         higher speeds compaired to all other types of A/D converters
B         very good accuracy without putting extreme requirments on component 
stability
C         poor rejection of power supply hum
D         better resolution compared to all other type of A/D convertors 
for the same            number ofbits
Que. 21     In an 8085 microprocessor system with memory mapped I/O
A         I/O devices have 16-bit address
B         I/O devices are accessed using IN and OUT instructions
C         there can be maximum of 256 input devices and 256 output devices
D         arithmetic and logic ooperation can be directly performed with 
the I/O data.
Que. 22     four memory clips of 16*4 size have their address bases connected together. 
The system will be of size
A         64*64
B         16*16
C         32*8
D         256*1
Que. 23     A switch tail ring counter is made byusing a single D FF.The resulting 
ckt is
A         SR flip flop
B         JK flip flop
C         D flip flop
D         T flip flop
Que. 24     By placing an inverter between both the input of an SR flip flop,it becomes
A         JK flip flop
B         D- flip flop
C         T flip flop
D         master slave JK flip flop
Que. 25     A 12-bit ADC is operating with a 1 micro sec clock period and the total 
conversion time is seen to be 14micro sec the ADC must be of the
A         flash type
B         counting type
C         integrating type
D         successive approximation type
Que. 26     in a 4-bit weighted resistor D/A convertor the resistor value corresponding 
to LSB is 16kw. the resistor value corrosponding to the MSB will be
A         1Kohm
B         2Kohm
C         4Kohm
D         16Kohm
Que. 27     The number of Boolean functions that can be generated by a variables, 
is equal to
A         2^n
B         2^2n
C         2^(2n-1)
D         2^n-2
Que. 28     A 0 to 6 counter consist of 3 flip flop and a combinational circuit of 
2 input gate(s).
A         one AND gate
B         one OR gate
C         one AND gate and one OR gate
D         two AND gates
Que. 29     In order to add 1111+1101, we required
A         one FA,one HA
B         three FA
C         three FA,one HA
D         none of these
Que. 30     The signed magnitude representation, the binary equivalent of 2205625 
is
A         0,10110.1011
B         0,10110.1001
C         1,10101.1001
D         1,10110.1001
Que. 31     The number of bits needed to encode all letters (26),10 symbols and all 
numbers (10) is
A         5
B         7
C         6
D         8
Que. 32     The use of a cache in a computer system increases the
A         available memory space for the program
B         available memory space for data
C         avrage speed of memory acces
D         addressing range of CPU
Que. 33     A  microprocessor has 24 address lines and 32 data lines if it uses 10-bits 
of op-code the size of its memory buffer register is
A         22 bits
B         24 bits
C         32 bits
D         14 bits
Que. 34     Schottky damping is resosted to in TTL gates
A         to reduce propogation delay
B         to increases the noise margin
C         to increase the packing margin
D         to increase fan-out
Que. 35     A pulse train can be delayed by a finite number periods using of clock
A         a serial-in-serial out shift resistor
B         a serial -in parallel out shift resistor
C         a parallel -in series out shift resistor
D         a serial -in parallel shift resistor
Que. 36     The switching speed of ECL is very high,because
A         the transistors are switched between cutoff and saturation regions
B         the transistors are switched between active and saturation regions
C         the transistors are switched between active and cutoff regions
D         the transistors may be operated in three regions
Que. 37     The number of comparators in a parallel conversion type 8-bit A to D converter 
is
A         8
B         16
C         255
D         256
Que. 38     A dynamic RAM cell which holds 5v has to be refreshed every 20m secs, 
so that the stored voltage does not fall by more than 0.5v. if the cell 
has a constant discharge current of 0.1pA the storage capacitance of the 
cell is
A         4*10^-6F
B         4*10^-9 F
C         4*10^-12F
D         4*10^-15F
Que. 39     The minimized from of the logical expression  (ABC+ABD+ABC+ABC)
A         AC+BC+AB
             _ _  _
B         AC+BC+AB
            _  _  _
C         AC+BC+AB
             _ _   _
D         AC+BC+AB
Que. 40     For a binary half-subtractor having two inputs A and B the correct set 
of logical expression for the output D(=A minus) and X(=barrow) are
A         D=AB+AB, X=AB
              _   _  _     _
B         D=AB+AB+AB, X=AB
              _   _    _
C                  D=AB+AB, X=AB
                 __     _
D         D=AB+AB, X=AB

Author	Message
aparna Groupie Joined: 30Apr2007 Online Status: Offline Posts: 70	Topic: GATE–Sample Questions-Digital Circuit Posted: 27Nov2007 at 2:41am
	Que. 1 Which one of the following is equivalent to AND-OR realization? A NAND-NOR realization B NOR-NOR realization C NOR-NAND realization D NAND-NAND realization Que. 2 The minimal function that can detect a " divisible by 3" 8421 BCD code digit is given by A D3D1+D4D2+D3D2D1 B D3D1+D4D2D1+D1'D2D1+D3D4D2'D1' C D4D1+D4D2+D3D1'D2'D1 D D4D2D1'+D4'D2D1+D3D4D2D1 Que. 3 choose the correct statement from the following A PROM contains a progrmmable AND array and a fixed OR array B PLA contains a fixed AND array and a programmable OR array C PROM contains a fixed AND array and a programmable OR array D PLA contains a programmable AND array and a programmable OR array Que. 4 A PLA can be used A as a microprocessor B as a dynamic memory C to realise a sequential logic D to realise a combitional logic Que. 5 A dynamic RAM consist of A 6 transistors B 2 transistors and 2 capacitors C 1 transistors and 1 capacitors D 2 capacitors only Que. 6 When a CPU is interrupted, it A stops execution of instrution B acknowledges interrupt and branches of subroutine C acknowledges interrupt and continues D acknowledges interrupt and waits for the next instrutions from the interrupting device Que. 7 The advantage of using a dual slop ADC in a digital voltmeter is that A its conversion time is small B its accuracy is high C its gives output in BCD FORMAT D it does not required a comparator Que. 8 The minimum number of comparators required to build an 8 bit flash ACD is A 8 B 63 C 255 D 256 Que. 9 The number of address lines in a 8 bit 4k ROM is A 8 B 10 C 12 D 16 Que. 10 The master-slave flip flop has the characteristic that A change in the input immediately in the output B change in the output occurs when the state of the master is affected C change in the output occurs when the state of the slave is affected D both the master and slave states are affected at the same time Que. 11 A divide by 78 counter can be realized by using A 6 nos. of mod-13 counters B 13 nos. of mod-10 counters C one mod-13 counters followed by one mod-6 counter D 13nos. and mod-13 counters Que. 12 Decimal number 5 in level parity self correcting code A 00101 B 01011 C 01100 D 10000 Que. 13 The resolution of a D/A convertor is approximately 0.4% of its full scale range.it is A an 8-bit convertor B a 10-bit convertor C a 12-bit convertor D a 16-bit convertor Que. 14 The switching speed of ECL is very high,because A the transistors are switched between cutoff and saturation regions B the transistors are switched between active and saturation regions C the transistors are switched between active and cutoff regions D the transistors may be operated in three regions Que. 15 _ the logical expression Y=A + AB is equal to A y=AB B y=AB C y=A+B D y=A+B Que. 16 Which of the following use least power? A TTL B ECL C CMOS D all use same power Que. 17 A system has a word length of 4-bits.If in this system -ve numbers are represented by their Two's compliment,then the range of numbers that can be represented by the word length is A -8 to +8 B -7 to +7 C -16 to +16 D none of these Que. 18 Hamming codes are used for error dection and correction.if the minimim hammining distance is m, then the number of errors correctable is A equal to m B less than m/2 C equal to 2m D greater than m Que. 19 An analog voltage is in the range of 0 to 8v is divided in eight equal intervals for conversion to 3-bit digital output the maximum quantization error is A 0v B 0.5v C 1v D 2v Que. 20 Dule slop integration type A/D converters provide A higher speeds compaired to all other types of A/D converters B very good accuracy without putting extreme requirments on component stability C poor rejection of power supply hum D better resolution compared to all other type of A/D convertors for the same number ofbits Que. 21 In an 8085 microprocessor system with memory mapped I/O A I/O devices have 16-bit address B I/O devices are accessed using IN and OUT instructions C there can be maximum of 256 input devices and 256 output devices D arithmetic and logic ooperation can be directly performed with the I/O data. Que. 22 four memory clips of 164 size have their address bases connected together. The system will be of size A 6464 B 1616 C 328 D 2561 Que. 23 A switch tail ring counter is made byusing a single D FF.The resulting ckt is A SR flip flop B JK flip flop C D flip flop D T flip flop Que. 24 By placing an inverter between both the input of an SR flip flop,it becomes A JK flip flop B D- flip flop C T flip flop D master slave JK flip flop Que. 25 A 12-bit ADC is operating with a 1 micro sec clock period and the total conversion time is seen to be 14micro sec the ADC must be of the A flash type B counting type C integrating type D successive approximation type Que. 26 in a 4-bit weighted resistor D/A convertor the resistor value corresponding to LSB is 16kw. the resistor value corrosponding to the MSB will be A 1Kohm B 2Kohm C 4Kohm D 16Kohm Que. 27 The number of Boolean functions that can be generated by a variables, is equal to A 2^n B 2^2n C 2^(2n-1) D 2^n-2 Que. 28 A 0 to 6 counter consist of 3 flip flop and a combinational circuit of 2 input gate(s). A one AND gate B one OR gate C one AND gate and one OR gate D two AND gates Que. 29 In order to add 1111+1101, we required A one FA,one HA B three FA C three FA,one HA D none of these Que. 30 The signed magnitude representation, the binary equivalent of 2205625 is A 0,10110.1011 B 0,10110.1001 C 1,10101.1001 D 1,10110.1001 Que. 31 The number of bits needed to encode all letters (26),10 symbols and all numbers (10) is A 5 B 7 C 6 D 8 Que. 32 The use of a cache in a computer system increases the A available memory space for the program B available memory space for data C avrage speed of memory acces D addressing range of CPU Que. 33 A microprocessor has 24 address lines and 32 data lines if it uses 10-bits of op-code the size of its memory buffer register is A 22 bits B 24 bits C 32 bits D 14 bits Que. 34 Schottky damping is resosted to in TTL gates A to reduce propogation delay B to increases the noise margin C to increase the packing margin D to increase fan-out Que. 35 A pulse train can be delayed by a finite number periods using of clock A a serial-in-serial out shift resistor B a serial -in parallel out shift resistor C a parallel -in series out shift resistor D a serial -in parallel shift resistor Que. 36 The switching speed of ECL is very high,because A the transistors are switched between cutoff and saturation regions B the transistors are switched between active and saturation regions C the transistors are switched between active and cutoff regions D the transistors may be operated in three regions Que. 37 The number of comparators in a parallel conversion type 8-bit A to D converter is A 8 B 16 C 255 D 256 Que. 38 A dynamic RAM cell which holds 5v has to be refreshed every 20m secs, so that the stored voltage does not fall by more than 0.5v. if the cell has a constant discharge current of 0.1pA the storage capacitance of the cell is A 410^-6F B 410^-9 F C 410^-12F D 410^-15F Que. 39 The minimized from of the logical expression (ABC+ABD+ABC+ABC) A AC+BC+AB _ _ _ B AC+BC+AB _ _ _ C AC+BC+AB _ _ _ D AC+BC+AB Que. 40 For a binary half-subtractor having two inputs A and B the correct set of logical expression for the output D(=A minus) and X(=barrow) are A D=AB+AB, X=AB _ _ _ _ B D=AB+AB+AB, X=AB _ _ _ C D=AB+AB, X=AB __ _ D D=AB+AB, X=AB Post Resume:* Click here to Upload your Resume & Apply for Jobs

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